CoWoS Packaging Capacity (TSMC)
Newest print Dec 2025Model run Mar 2026Reviewed quarterlyCSV — newest observations; full series with a Pro keyAPI
CoWoS Total Capacity: 72,500 wpm (End 2025) — Nomad Semi / SemiVision, Dec 2025 (estimate). Basis: nameplate capacity. +31.8% vs our Mid-2025 estimate.
CoWoS Packaging Capacity (TSMC) — latest readings
7 observations across 1 series, End 2023–End 2026.
| Series | Latest (wafers/month) | Source |
|---|---|---|
| CoWoS Total CapacityEnd 2025 | 72,500 wpm | Nomad Semi / SemiVisionDec 2025 |
TSMC CoWoS monthly capacity expansion with quarterly granularity from End 2023 through End 2026, tracking the AI chip packaging bottleneck from 13K to 125K+ wpm.
CoWoS Total Capacity: 72,500 wafers/month (End 2025), Nomad Semi / SemiVision, Dec 2025
2023–2024: 3 earlier prints — full ledger is Pro
- 1End 2023 — Critical Bottleneck: CoWoS at 13K wpm. H100 supply fully constrained. Lead times 26–52+ weeks.
Source: SemiVision / SemiWiki, Silicon Analysts model, Nomad Semi / SemiVision · Basis: nameplate capacity · Anonymous view: the newest 3 observations per series (Dec 2024–Dec 2025); 3 earlier prints back to 2023 — full ledger is Pro.
Prints ledger
| Note and copy | |||||||
|---|---|---|---|---|---|---|---|
| End 2025 | CoWoS Total Capacity | 72,500 wpm65,000 wpm–80,000 wpm | |||||
| Mid-2025 | CoWoS Total CapacityOur model estimate | 55,000 wpm50,000 wpm–60,000 wpm | |||||
Source: Silicon Analysts interpolation, Mar 2026 · Basis: nameplate capacity · Estimate Interpolated from End 2024 (40K) and End 2025 (72.5K). AP3 Tainan and AP5 expansions ramping. | |||||||
| End 2024 | CoWoS Total Capacity | 40,000 wpm | |||||
| CoWoS Total Capacity: 3 earlier prints, End 2023–Q3 2024 and 1 projection (End 2026) — full ledger is Pro | |||||||
| Showing the newest 3 observations per series (End 2024–End 2025); 3 earlier observations (End 2023–Q3 2024) and 1 projection are in Pro. | |||||||
Provenance
Sources: Nomad Semi (Sep 2024), TweakTown (Jun 2024), SemiVision/SemiWiki (Dec 2024), GlobalSemiResearch (Dec 2025).
Basis: nameplate capacity
Installed/announced monthly wafer capacity, not utilized output and not a booking allocation. Capacity a customer can actually reserve is lower.
Sources
- Nomad Semi (Sep 2024)
- TweakTown / Ctee (Jun 2024)
- SemiVision / SemiWiki (Dec 2024)
- Nomad Semi / SemiVision (Dec 2025)
- GlobalSemiResearch (Dec 2025)
Our derivations
- Silicon Analysts interpolation (Mar 2026)
Suggested citation
Silicon Analysts, "CoWoS Packaging Capacity (TSMC)", as of Dec 2025, https://siliconanalysts.com/market-data/cowos-capacity, retrieved October 13, 2026.
Showing the newest 3 observations per series (End 2024–End 2025); 3 earlier observations (End 2023–Q3 2024) and 1 projection are in Pro.
Model Bear / Base / Bull scenarios with interactive assumptions
Related Tools
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Market intelligence on this data
All market intelligence →GlobalFoundries Lands $2B TSMC Deal to Add First U.S. CoWoS Interposer Source
Capacity: ~$2B multi-year interposer supply agreement (five-year initial term), volume production from H1 2028; CoWoS capacity reported sold out through 2026; ~$400M/year, ~6% of GF 2025 revenue ($6.79B)
HBM4/4e Supply Squeeze Drives 50%+ Price Surge Threat; Nvidia Passes 15%+ Cost Hike Downstream
HBM price impact: +50%+ potential increase in 2027 (TrendForce via Polinews); AI server system pricing: +15%+ (Nvidia, multiple sources); AMD CoWoS demand: +308% YoY to 530,000 wafers in 2026 (Morgan Stanley); Global HBM TAM: ~$35B (2025) → ~$100B (2028), ~40% CAGR (Micron, Hot Chips 2026)
TSMC CoWoS 5.5x Reticle Hits 98-99% Yield in Volume Production; 14x Roadmap Confirmed to 2029
Yield: CoWoS 5.5x reticle confirmed at 98-99% in volume production (positive); Roadmap: 14x reticle-size CoWoS targeted by 2029; SoIC pitch: 6 microns currently in HVM, targeting 4.5 microns by 2029.
TSMC CoWoS Yield Confirmed at 98-99% in HVM; Nvidia Weighs 8-Stack HBM4E Fallback for Rubin Ultra
CoWoS yield: 98-99% confirmed in HVM (positive); HBM4E 12-stack yield risk flagged — potential stack-count reduction from 12 to 8 layers (est. HBM capacity-per-die reduction of ~33% if downgrade confirmed); TSMC 2026 CapEx raised to $60-64B record (capacity positive).
Frequently Asked Questions
- What is TSMC CoWoS capacity in 2026?
- TSMC CoWoS advanced packaging capacity is projected to reach 120,000–130,000 wafer starts per month by end of 2026, up from just 13,000 wpm at end of 2023. This roughly 10x expansion is driven by demand from NVIDIA B200/GB200 and AMD MI300X/MI400.
- Why is CoWoS a bottleneck for AI chips?
- CoWoS (Chip-on-Wafer-on-Substrate) is the only production-proven 2.5D packaging technology for integrating large logic dies with HBM stacks. Every NVIDIA H100, H200, and B200 requires CoWoS. Lead times exceeded 50 weeks in 2024, making it the primary constraint on AI chip supply.