Silicon Analysts

Fab Explorer (2026) — Semiconductor Fabrication Facility Map & Supply Chain Simulator

As of April 2026, explore 64 semiconductor fabrication facilities across 10 countries from 16 companies including TSMC, Samsung, Intel, SMIC, Rapidus, GlobalFoundries, UMC, Tower, PSMC, Hua Hong, Nexchip, VIS, ASE, Amkor, JCET, SPIL. Filter by technology node, country, capacity, and ownership. View 42 operational fabs,12 under construction, and 2 announced. Simulate product supply chains for Nvidia H100, Nvidia B100, Nvidia B200, Nvidia GB200, AMD MI300X, AMD MI325X, Intel Gaudi 3 and other AI accelerators with bottleneck identification across wafer fabrication and advanced packaging.

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Fab Explorer

v3.5 Studio
64of 64 fabs
53frontend
11backend
10countries
16companies
18constrained
36available
Mode:

Company

Country

Tech Node

Availability

Frontend Fab
Backend Fab

Aggregate Capacity Outlook (2024–2028)

Group by:
2025 Frontend1,915 kWSPM
2028 Projected2,465 kWSPM
Growth+29%
Fabs64

Frontend Wafer CapacitykWSPM (300mm equiv.)

Backend Packagingk units/mo

Related Analysis

Global Semiconductor Fabrication Landscape

The global semiconductor fab landscape is concentrated among a handful of companies and geographies. Understanding where chips are manufactured—and the capacity constraints at each location—is critical for supply chain risk assessment, procurement planning, and geopolitical analysis. This tool maps 64 semiconductor fab locations across 10 countries with filterable data on process nodes, capacity, and ownership.

Key Players and Geographic Footprints

TSMC dominates leading-edge production with major fabs in Hsinchu, Tainan, and Kaohsiung (Taiwan), plus expanding operations in Arizona and Kumamoto (Japan). Samsung operates advanced fabs in Pyeongtaek (South Korea) and Taylor (Texas). Intel's foundry fabs span Oregon, Arizona, Ireland, and Israel. SMIC in China focuses on mature and mid-range nodes, while Rapidus in Japan is targeting 2nm production. Together, these companies represent the vast majority of global chip manufacturing capacity.

Location, Cost, and Supply Chain Risk

Fab location directly affects manufacturing cost through labor rates, utility prices, government subsidies, and logistics. It also determines supply chain resilience—the concentration of leading-edge capacity in Taiwan has driven diversification efforts worldwide. Natural disasters, geopolitical tensions, and water scarcity can disrupt production at any single site, making geographic diversification a priority for chip buyers.

Government Incentives Reshaping the Map

The U.S. CHIPS Act ($52B), EU Chips Act (€43B), Japan's semiconductor subsidies, and India's incentive programs are fundamentally reshaping foundry capacity distribution. New fabs in Arizona, Ohio, Dresden, and Kumamoto will add significant capacity over 2025–2028, though ramp timelines and cost structures remain uncertain. This explorer tracks both operational and under-construction facilities.

Related: Chip Price Calculator · Price/Performance Frontier · Analysis Articles

All benchmarks and data are derived from publicly available sources (earnings calls, press releases, analyst reports, regulatory filings). Figures are estimates for educational purposes only and should not be used as the sole basis for business or investment decisions. Fab capacity splits use earnings-reported production mix for multi-node facilities. Full Terms & Data Provenance

Allocation Signals

Real-time allocation lead times by node and foundry.

Capacity availability scoring with geopolitical risk overlay.

Semiconductor Fab FAQ

Where are the major semiconductor fabs located worldwide?
Silicon Analysts tracks 64 fabrication facilities across 10 countries. Leading-edge fabs are concentrated in Taiwan (TSMC in Hsinchu, Tainan, Kaohsiung), South Korea (Samsung in Pyeongtaek, Hwaseong), the United States (Intel in Arizona; TSMC Arizona; Samsung Taylor TX; GlobalFoundries in Malta NY), Japan (Rapidus Hokkaido, TSMC Kumamoto), and Europe (Intel Ireland, TSMC Dresden, GlobalFoundries Dresden). China (SMIC, Hua Hong, Nexchip) and Singapore (GlobalFoundries, UMC) also host significant mature-node capacity.
How many semiconductor fabs does TSMC operate?
Our database tracks 23 TSMC facilities, including frontend wafer fabs and advanced backend packaging plants. TSMC operates primarily in Taiwan (Hsinchu, Taichung, Tainan, Kaohsiung), with expanding operations in Arizona (USA), Kumamoto (Japan), and Dresden (Germany). These fabs span process nodes from mature (28nm/40nm) to cutting-edge (2nm/A16), with the most advanced nodes concentrated in Taiwan.
What is the CHIPS Act and how does it affect fab locations?
The U.S. CHIPS Act provides $52 billion in subsidies to incentivize domestic semiconductor manufacturing. In our database, 9 fabs have received CHIPS Act funding, including facilities from TSMC, Samsung, Intel, GlobalFoundries, and Amkor. Similar programs in the EU (€43B), Japan, and India are reshaping global fab distribution to reduce supply chain concentration in East Asia.
How much does it cost to manufacture an NVIDIA B200?
Based on our supply chain model, the estimated COGS for the NVIDIA B200 is approximately $5,785, broken down into silicon die costs, $2,900 HBM3e memory, $1,100 CoWoS-L packaging, and $400 other BOM. At a market price of $40,000, this represents approximately 86% gross margin. Explore detailed cost breakdowns in the AI Supply Chain Scenario Simulator.
What is the CoWoS packaging bottleneck?
Advanced packaging (CoWoS) is the primary bottleneck for AI chip production. TSMC's CoWoS capacity across AP3, AP5, and AP6 facilities is rapidly expanding but still constrained relative to demand from NVIDIA, AMD, and hyperscaler ASICs. Our Allocation Studio lets you model supply/demand gaps with yield stress and demand surge scenarios.
Where is TSMC building new fabs?
TSMC is actively expanding beyond Taiwan. Key construction projects include: Fab 21 Phase 2-3 in Phoenix, Arizona (3nm and 2nm); JASM Phase 2 in Kumamoto, Japan (6nm/7nm); ESMC in Dresden, Germany (22nm/28nm); and new advanced-node capacity in Kaohsiung and Hsinchu, Taiwan (2nm/A16). These expansions are supported by government subsidies including the US CHIPS Act, Japanese Government grants, and EU Chips Act funding.

Semiconductor Fab Database — 64 Facilities

53 frontend wafer fabs and 11 backend packaging facilities from 16 companies across 10 countries. Data as of April 2026.

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Frontend Wafer Fabs

CompanyFab NameLocationCountryStatusTech NodesHVM StartCap. 2025 (kWSPM)Cap. 2026 (kWSPM)Subsidy
GlobalFoundriesFab 1 (Dresden)Dresden, SaxonyGermanyIn Production22nm, 28nm, 40nm2005
GlobalFoundriesFab 7 (Burlington)Burlington, VermontUSAIn Production90nm, 130nm, 180nm2002
GlobalFoundriesFab 8 (Malta)Malta, New YorkUSAIn Production12nm, 14nm, 22nm2012
GlobalFoundriesSingapore (Woodlands)Woodlands, SingaporeSingaporeIn Production22nm, 40nm, 130nm2010
Hua HongShanghai FabShanghai, ShanghaiChinaIn Production55nm, 90nm, 130nm2005
Hua HongWuxi FabWuxi, JiangsuChinaIn Production40nm, 55nm, 90nm2019
IntelFab 11XKiryat Gat, SouthernIsraelAnnouncedIntel 18A2028
IntelFab 28Kiryat Gat, SouthernIsraelIn ProductionIntel 72019
IntelFab 34Leixlip, KildareIrelandIn ProductionIntel 4, Intel 32023
IntelFab 42Chandler, ArizonaUSAUnder ConstructionIntel 20A, 18A2025
IntelFab 52 & 62Chandler, ArizonaUSARampingIntel 18A2024
IntelOhio OneNew Albany, OhioUSAUnder ConstructionIntel 18A2030
NexchipHefei FabHefei, AnhuiChinaIn Production28nm, 40nm, 55nm2020
PSMCHsinchu FabHsinchu, TaiwanTaiwanIn Production28nm, 40nm, 55nm2010
PSMCTongluo FabTongluo, MiaoliTaiwanIn Production28nm, 40nm2016

+ 38 more frontend fabs

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Backend & Advanced Packaging Facilities

CompanyFacilityLocationCountryStatusPackaging TechHVM StartCap. 2025 (k units)Cap. 2026 (k units)
AmkorIncheon FabIncheon, GyeonggiSouth KoreaIn Production2.5D, FcBGA, SiP2015
AmkorPeoria FabPeoria, ArizonaUSAUnder Construction2.5D, FcBGA, SiP2025
ASEKaohsiung (K12/K21)Kaohsiung, TaiwanTaiwanIn ProductionCoWoS-S, FcBGA, FoCoS2010

+ 8 more backend facilities

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AI Accelerator Supply Chain Profiles

Estimated cost structures for leading AI accelerators modeled in the supply chain simulator.

ChipProcess NodeDie Size (mm²)Die CountWafer CostPackagingHBM CostEst. COGSMarket PriceEst. Margin
Nvidia H100N48141$16,000CoWoS-S$1,350$2,943$28,00089%
Nvidia B1004NP8002$18,000CoWoS-L$2,900$5,683$32,00082%
Nvidia B2004NP8202$18,000CoWoS-L$2,900$5,785$40,00086%
Nvidia GB2004NP8202$18,000CoWoS-L$5,800$10,185$65,00084%
AMD MI300XN51158$15,000SoIC + CoWoS$2,900$4,649$15,00069%
AMD MI325XN51158$15,000SoIC + CoWoS$2,200$3,299$20,00084%
Intel Gaudi 3TSMC 5nm5001$15,000OAM$1,950$3,784$15,62576%

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