Data contracts / chart
Chip Design & NRE Cost by Node
Total chip design cost escalation from 180nm to 2nm.
- Coverage window
- 180nm → 2nm (10 rows)Computed from the backing series at page-render time — never typed by hand.
- History honesty
- Observations recorded as published; no archive backfill flag on this series.
- Cadence
- Weekly — cost models recompute when inputs move (Monday refresh fleet, 11:00–12:30 UTC); values are stable between input changes.
- Revision policy
- Points change only through staged updates (market_data_staged_updates) with an audit log; the Pro export carries X-Corrections-Count.
- Sources (source_name)
- IBS / SemiEngineering (2) · Industry consensus (1) · IBS (Handel Jones) / SemiEngineering (1) · IBS (2018) (1) · SemiAnalysis (1) · SemiAnalysis adjusted (1) · Silicon Analysts estimate (1) · IBS (Handel Jones) (1)
- Known gaps
- Known-gaps review pending — the coverage boundaries above are computed and current, but the curator’s qualitative gaps assessment has not been written yet. We state that rather than inventing one.
- Access
- Free API keyAPI:
/api/v1/market-data/nre-design-cost - Machine-readable
/api/v1/catalog/nre-design-cost/contract